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Intel(r) Server Platforms SE7320SP2 / SE7525GP2 BIOS RELEASE NOTES
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INTEL Enterprise Platform & Services Marketing
Intel Corporation
2111 N.E. 25th Avenue, Hillsboro, OR 97124 USA
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DATE: 		Oct. 07, 2004
TO:		Intel server platform SE7320SP2 / SE7525GP2 customers
SUBJECT:	BIOS Release Notes: P05 (build 028)
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Information in this document is provided in connection with Intel products. 
No license, express or implied, by estoppel or otherwise, to any intellectual 
property rights is granted by this document. Except as provided in Intel's 
Terms and Conditions of Sale for such products, Intel assumes no liability 
whatsoever, and Intel disclaims any express or implied warranty, relating to 
sale and/or use of Intel products including liability or warranties relating 
to fitness for a particular purpose, merchantability, or infringement of any 
patent, copyright or other intellectual property right. Intel Corporation may 
have patents or pending patent applications, trademarks, copyrights, or other 
intellectual property rights that relate to the presented subject matter. The 
furnishing of documents and other materials and information does not provide 
any license, express or implied, by estoppel or otherwise, to any such 
patents, trademarks, copyrights, or other intellectual property rights.  
Intel products are not intended for use in medical, life saving, or life 
sustaining applications. Intel may make changes to specifications and product 
descriptions at any time, without notice.

Intel is a registered trademark of Intel Corporation. 

*Other names and brands are the property of their respective owners.

Copyright (c) 2004 Intel Corporation.

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                              ABOUT THIS RELEASE
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Build #		: 028
Build Stamp	: SE7320SP20.86B.P.05.00.0028.100720041028
		  SE7525GP20.86B.P.05.00.0028.100720041028
		  
Build Date	: 07 Oct. 2004

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                           BIOS COMPONENTS/CONTENTS
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Processor stepping(s) supported: Intel(R) Xeon(TM) Processors MP

Microcode update versions:
Name                	 Description                           	Stepping(s)
-------------      	 ------------------------------        	-------------------
M01F3013.TXT		Assembly format, Revision 13  		A-0 
M0DF310B.TXT	 	Assembly format, Revision 0B		B-0 
M0DF3207.TXT		Assembly format, Revision 07		B-1 
M01F3703.TXT	 	Assembly format, Revision 03		C-1 
M1DF3413.TXT	 	Assembly format, Revision 0D		D-0 
MBDF4109.TXT	 	Assembly format, Revision 0E		E-0 

System hardware configurations supported: SE7320SP2/SE7525GP2 revision FAB5/6

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                       SYSTEM FIRMWARE REQUIREMENTS/REVISIONS
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BMC FW	:  2.31 or later
BMC CFG	:  1.20 or later

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                           IMPORTANT INSTALLATION NOTES
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IMPORTANT NOTES:

1.	Refer to INSTALL.TXT for installation instructions. 



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                              FEATURES ADDED / Fixed
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Build 028: P05
- IERR# fixed (D30:F0: offset 50 (bit 4) should be set to a 1.)
- BIOS should enable the Unsupported Request Error Mask (EXP_UNCERRMSK.b20)
  on each PCIe Device Register.
- Executed the SATA OOB workaround before memory initializing.
- Support AMI DMI edit tool (v2.00.33) to change SMBIOS Type11 (OEM String) 
  information.
- Update EFI to latest drop.
- Changed the 'Quiet Boot' default setting from 'Disabled' to 'Enabled'.
- Update the 6300ESB Option ROM to latest
- Upddate onboard NIC 82541GI optrom to 1.2.22 from 1.2.19.
- Use PCI SERR to log PCI-E Uncorretable ERROR.
- Follow the SP EPS v1.01 to implement FSB/Hublink/MBUF SEL.
- Update the Lindenhurst memory reference code to v1.04 from v1.03.
- Update CPU module to 8.00.00_CPU-P4_3C.07 from 8.00.00_CPU-P4_3C.02.
- Update IST ICH to 8.00.10_IST_09A from 8.00.10_IST_09.
- Implement the latest drop(ASD_07072004) of multi-language.
- Implement the ACPI MCFG table for PCI Express.
- Integrated LH_Error_reporting_rev023.
- Add No-Execute (NX) Memory Protection Technology to BIOS Setup Option and
  default setting is disabled.
- Follow SP EPS v1.01 to change the BIOS Recovery behavior from reset to halt 
  when BIOS Recovery is completed.
- Send chassis reset command to mBMC to perform warm reset.
- Integrated Rolling BIOS Beta4 and Rolling BIOS watchdog will stop at
  checkpoint 0x03.
- Enhanced Halt State (C1E) is enabled if pcocessor supports this feature.
- Support recovery from USB CDROM and USB floppy.
- Do not force PIRQA-D routing to IRQ7 if the MCH stepping is C4 stepping.


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                              REFERENCE MATERIAL
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Intel(R) Server Platform SE7320SP2 / SE7525GP2 Technical Product Specification (TPS) 

Technical Support: http://support.intel.com

[END OF RELEASE NOTES]